The invention generally relates to computer bus systems and in particular to a bridge or interface element for interconnecting a host computer bus with an external bus, such as a Peripheral Component Interface (PCI) bus.
PCI bus systems are becoming increasingly popular for use within personal computers, particularly, personal computers configured as file servers. A PCI bus is a high performance, high bandwidth bus configured in accordance with protocols established by the PCI Special Interest Group.
In a typical computer system employing a PCI bus, a PCI-to-host bridge is provided between the PCI bus and a host bus of the computer system. The bridge is provided, in part, to facilitate conversion of data from the PCI format to a format employed by the host bus. Many PCI-to-host bridges are configured to accommodate only a 32-bit PCI bus. Others are configured to accommodate either only a 64-bit PCI bus or only a 32-bit PCI bus. Accordingly, to accommodate more than one PCI bus requires additional PCI-to-host bridges. For many computer systems, particularly file server computer system, numerous PCI buses must be accommodated. The conventional arrangement, wherein one bridge is required for each PCI bus, offers little flexibility. Moreover, many state of the art host buses are highly sensitive to the number of computers, such as bridges, connected to the bus. With such buses the maximum permissible clock rate is often inversely proportional to the number of components connected to the host bus due to the electrical load supplied by each component. Accordingly, the connection of additional bridges to the host bus results in a lowering of the maximum permissible clock rate, thereby lowering the overall performance of the system. As a result, the connection of an additional PCI bridge may lower the maximum permissible clock rate to a level which significantly hinders the performance of the overall computer system.
Accordingly, there is a need for a more flexible technique for interconnecting PCI buses to a host bus without adding additional electrical loads to the host bus.